Cache memories have typically been utilized to provide an intermediate storage area for blocks of memory between the central processing unit and the slower main memory. By utilizing the faster cache memory to provide this intermediate storage, an overall faster operating speed can be achieved. Additionally, the more expensive and more power consuming cache memory is of significantly lower density than the lower power, lower speed main memory. However, the power consumption of the cache memory has been a disadvantage in battery powered personal computing products.
In battery powered personal computing products, it is desirable to provide a cache memory in order to speed processing time, especially for programs that are memory intensive; i.e., those that require access to data stored on the disk. In fact, some microprocessors have a built in cache memory which is an important aspect of the microprocessor. When power is not a concern, there is no problem. However, in battery operated systems, this presents a significant problem. Of course, the cache can be turned off to reduce this power. Further, some cache memory has been employed to reduce the amount of access to the disk, wherein the disk is turned off during this time. Unfortunately, the power savings due to the reduction in power consumption by the disk through use of the cache memory is typically overshadowed by the power consumption of the cache memory itself. The reason for this is that cache memories typically utilize Static Random Access Memory (SRAM) as opposed to Dynamic Random Access Memory (DRAM). The SRAM-based systems consume significant power to maintain storage without entering a refresh cycle.